1. Field of the Invention
The present invention relates to a thin-film transistor in which an oxide semiconductor layer is used, and to a display device provided with the thin-film transistor.
2. Description of the Related Art
An oxide semiconductor such as zinc oxide and Indium Gallium Zinc Oxide (IGZO) exhibits a superior property as an active layer of a semiconductor device. In recent years, development of such an oxide semiconductor is in progress, aiming at an application such as a thin-film transistor (hereinafter may be referred to as “TFT”), a light-emitting device, a transparent conductive film, and so forth.
For example, the TFT utilizing the oxide semiconductor is high in electron mobility and has excellent electrical characteristics as compared with TFT, used in existing liquid crystal display devices, that utilizes amorphous silicon (a-Si:H) for a channel. The TFT utilizing the oxide semiconductor also has an advantage that high electron mobility can be expected even when temperature is low around room temperature.
On the other hand, it is known that the oxide semiconductor is insufficient in heat resistance, and desorption of oxygen, zinc, and the like occurs by a heat treatment during a manufacturing process of TFT to form a lattice defect. The lattice defect forms an electrically shallow impurity level, and causes low resistance in an oxide semiconductor layer. Thereby, the TFT exhibits a normally-on operation or a “depletion operation”, in which a drain current flows even when a gate voltage is not applied. When increase in the defect level progresses, a threshold voltage becomes small and thus a leak current increases.
Also, such a lattice defect prevents induction of carriers in zinc oxide serving as an active layer, and reduces carrier concentration. The reduction in the carrier concentration lowers electrical conductivity of the active layer, and thus influences the electron mobility and current transmission characteristics (for example, sub-threshold characteristic, threshold voltage, etc.) of the TFT.
Accordingly, Japanese Patent Registration No. 3913756, for example, proposes to configure a gate insulating layer, which is in contact with a channel layer including an oxide semiconductor, by amorphous aluminum oxide (Al2O3) to reduce a defect level at an interface.